Samsung has achieved a significant breakthrough in chip design by utilizing Synopsys’ AI control software suite. This has enabled the streamlining of the entire SoC chip design process with advanced 3nm process technology. Synopsys’ toolkit consists of DSO for chip design, VSO for functional verification, and TSO for silicon testing. By leveraging deep learning models, these AI modules automate and speed up the time-consuming stages of chip development.
The machine learning algorithms handle the difficult tasks typically left to human engineers in chip design, from architectural planning to physical implementation and verification. For Samsung’s mysterious mobile chip, AI takes control of everything from location and route layout to approval and optimization of performance, power, and area metrics.
Thanks to AI-optimized techniques like design partitioning, multi-source clocking, and wire mapping, Samsung’s 3nm SoC boasts the ability to increase peak CPU frequency to 300 MHz along with reduced power consumption. Movement has decreased by 10%, which is a remarkable feat for an AI-engineered silicon brain.
Furthermore, this marks Samsung’s foray into high-performance GAAFET silicon for high-end mobile devices, with the support of Synopsys. Samsung has finally entered the field of high-performance GAAFET silicon for high-end mobile devices. The AI-based design process can help the company accelerate GAAFET performance for Exynos chips found in future flagship Galaxy smartphones and tablets.
This development is also noteworthy as it marks Samsung’s first iteration of a complex design with the latest 3nm GAAFET (gate-all-around FET) manufacturing technology. Although GAAFET has been in commercial production for nearly two years, Samsung has so far limited it to relatively simple cryptocurrency mining processors.
Both companies did not disclose the details about the 3nm chip developed by this AI design, but it could be used for the second generation SF3 node process, which is more refined than the SF3E before that.
